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PhD Position | Fully Funded

F/M Reliability Enhancement of Post-Von Neumann Hardware Accelerators

Inria, France

3 Years
Duration

€2,100/ Month
Funding

Jan 15, 2025
Application Deadline

Feb 1, 2025
Starting Date

About

In this Ph.D., we will identify hardware and software vulnerabilities in PIM accelerators for DNNs and propose fault mitigation techniques.

Overview

Theme/Domain : Architecture, Languages and Compilation
System & Networks (BAP E)

Artificial Intelligence (AI) is increasingly indispensable across various society sectors due to its potential to transform conventional applications, from smart homes to safety-critical systems like autonomous driving and space exploration. Deep neural networks (DNNs) are state-of-the-art AI methods that outperform other approaches in language processing, image and video classification, audio and radar processing, and instance segmentation [1–3]. Notably, DNNs such as OpenAI GPT-4, Meta LLaMA2, and Mistral Mixture of Experts have captivated public interest with their high accuracy. 

Due to their resource-intensive nature, DNNs require powerful dedicated hardware accelerators, such as GPUs and TPUs. However, large hardware accelerators are unsuitable for embedded safety-critical systems due to their high energy consumption. New unconventional accelerator architectures like the ones based on PIM [4] and neuromorphic computing [5] have been proposed for complex DNN deployment in critical applications where power and performance are critical requirements, offering energy-efficient alternatives to traditional GPUs and TPUs. However, their reliability, particularly against radiation-induced faults, remains to be fully assessed.

In this Ph.D., we will identify hardware and software vulnerabilities in PIM accelerators for DNNs and propose fault mitigation techniques.

About Us

The Inria Rennes – Bretagne Atlantique Centre is one of Inria’s eight centres and has more than thirty research teams. The Inria Center is a major and recognized player in the field of digital sciences. It is at the heart of a rich R&D and innovation ecosystem: highly innovative PMEs, large industrial groups, competitiveness clusters, research and higher education players, laboratories of excellence, technological research institute, etc.

Eligibility and requirements

Level of qualifications required : Graduate degree or equivalent

Skills

Mandatory skills (the candidate must have):

  • Strong knowledge of computer architecture
  • Strong programming knowledge of C/C++ and Python

Optional skills:

  • HW design: VHDL/Verilog basics, HW synthesis flow
  • Basics of Machine Learning
  • Experience with High-Level Synthesis (HLS) is a plus
  • Experience in fault-tolerant architectures is a plus
  • Knowledge of compilers and LLVM is a plus

Languages: proficiency in written English and fluency in spoken English. The interviews for the PhD will be in English.

Relational skills: the candidate will work in a research team, where regular meetings will be set up. The candidate has to be able to present the progress of their work in a clear and detailed manner.

Other values appreciated: Open-mindedness, strong integration skills, and team spirit.

Most importantly, we seek highly motivated candidates.

Funding

Benefits package

  • Subsidized meals
  • Partial reimbursement of public transport costs
  • Possibility of teleworking (90 days per year) and flexible organization of working hours
  • Partial payment of insurance costs

Remuneration

Monthly gross salary amounting to 2100 euros for the first and second years and 2200 euros for the third year

Contacts

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